TY - JOUR
T1 - A Self-Adaptive SEU Mitigation Scheme for Embedded Systems in Extreme Radiation Environments
AU - Lu, Yufan
AU - Zhai, Xiaojun
AU - Saha, Sangeet
AU - Ehsan, Shoaib
AU - McDonald-Maier, Klaus D.
N1 - Funding Information:
This work was supported by the U.K. Engineering and Physical Sciences Research Council under Grant EP/R02572X/1, Grant EP/P017487/1, and Grant EP/V034111/1.
Publisher Copyright:
Author
PY - 2022/3/1
Y1 - 2022/3/1
N2 - When electronic systems are working in radiation environments, transient errors, and permanent errors may occur. Static random-access memory (SRAM) has been the one of most significant parts in various semiconductor chips for its high performance and high logic density features. However, because of their dedicated electronic circuits, SRAMs are sensitive to radiation effects. In this article, a portable scheme combined with error correcting code (ECC) and refreshing techniques is proposed to correct errors and mitigate error accumulation in extreme radiation environments. Since the proposed scheme is small and transparent to other modules and no additional latency is introduced, it therefore can be easily applied to the system where the hardware modules are designed with fixed reading and writing latency. We evaluated this design by simulation in a hardware fault injection platform and radiation experiments in the neutron radiation facility. The results obtained in the neutron experiment, where the flux of neutron particles is 5×106 cm2. s−1 , show that the number of bit-flips in 32 kB self-refresh ECC RAM on the Xilinx Artix-7 FPGA remains zero, while the number of bit-flips in unhardened RAM rose to 32 in 1.5 h.
AB - When electronic systems are working in radiation environments, transient errors, and permanent errors may occur. Static random-access memory (SRAM) has been the one of most significant parts in various semiconductor chips for its high performance and high logic density features. However, because of their dedicated electronic circuits, SRAMs are sensitive to radiation effects. In this article, a portable scheme combined with error correcting code (ECC) and refreshing techniques is proposed to correct errors and mitigate error accumulation in extreme radiation environments. Since the proposed scheme is small and transparent to other modules and no additional latency is introduced, it therefore can be easily applied to the system where the hardware modules are designed with fixed reading and writing latency. We evaluated this design by simulation in a hardware fault injection platform and radiation experiments in the neutron radiation facility. The results obtained in the neutron experiment, where the flux of neutron particles is 5×106 cm2. s−1 , show that the number of bit-flips in 32 kB self-refresh ECC RAM on the Xilinx Artix-7 FPGA remains zero, while the number of bit-flips in unhardened RAM rose to 32 in 1.5 h.
KW - Clocks
KW - Error correcting codes (ECCs)
KW - Field programmable gate arrays
KW - Hardware
KW - Materials handling
KW - neutron radiation
KW - Ports (computers)
KW - Random access memory
KW - SEU mitigation
KW - static random access memory (SRAM)
KW - Timing
KW - Neutron radiation
KW - Static random access memory (SRAM)
UR - http://www.scopus.com/inward/record.url?scp=85124069221&partnerID=8YFLogxK
U2 - 10.1109/JSYST.2022.3144019
DO - 10.1109/JSYST.2022.3144019
M3 - Article
AN - SCOPUS:85124069221
VL - 16
SP - 1436
EP - 1447
JO - IEEE Systems Journal
JF - IEEE Systems Journal
SN - 1932-8184
IS - 1
M1 - 9695516
ER -