TY - JOUR
T1 - ACCURATE
T2 - Accuracy Maximization for Real-Time Multi-core systems with Energy Efficient Way-sharing Caches
AU - Saha, Sangeet
AU - Chakraborty, Shounak
AU - Zhai, Xiaojun
AU - Ehsan, Shoaib
AU - McDonald-Maier, Klaus
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2022/12/1
Y1 - 2022/12/1
N2 - Improving result accuracy in approximate computing (AC)-based real-time applications without violating deadlines has recently become an active research domain. Execution time of AC real-time tasks can individually be separated into: execution of the mandatory part to obtain a result of acceptable quality, followed by a partial/complete execution of the optional part to improve the result accuracy of the initial result within a given deadline. However, obtaining higher result accuracy at the cost of enhanced execution time may lead to deadline violation, along with higher energy usage. We present ACCURATE, a novel hybrid offline-online approximate real-time scheduling approach that first schedules AC-based tasks on multicore with an objective to maximize result accuracy and determines operational processing speeds for each task constrained by system-wide power limit, deadline, and task dependency. At runtime, by employing a way-sharing technique (WH_LLC) at the last level cache (LLC), ACCURATE improves performance, which is further leveraged, to enhance result accuracy by executing more from the optional part and to improve the energy efficiency of the cache by turning off a controlled number of cache ways. ACCURATE also exploits the slacks either to improve the result accuracy of the tasks or to enhance the energy efficiency of the underlying system, or both. ACCURATE achieves 85% QoS with 36% average reduction in cache leakage consumption with a 24% average gain in energy-delay product (EDP) for a 4-core-based chip multiprocessor (CMP) with 6.4% average improvement in performance.
AB - Improving result accuracy in approximate computing (AC)-based real-time applications without violating deadlines has recently become an active research domain. Execution time of AC real-time tasks can individually be separated into: execution of the mandatory part to obtain a result of acceptable quality, followed by a partial/complete execution of the optional part to improve the result accuracy of the initial result within a given deadline. However, obtaining higher result accuracy at the cost of enhanced execution time may lead to deadline violation, along with higher energy usage. We present ACCURATE, a novel hybrid offline-online approximate real-time scheduling approach that first schedules AC-based tasks on multicore with an objective to maximize result accuracy and determines operational processing speeds for each task constrained by system-wide power limit, deadline, and task dependency. At runtime, by employing a way-sharing technique (WH_LLC) at the last level cache (LLC), ACCURATE improves performance, which is further leveraged, to enhance result accuracy by executing more from the optional part and to improve the energy efficiency of the cache by turning off a controlled number of cache ways. ACCURATE also exploits the slacks either to improve the result accuracy of the tasks or to enhance the energy efficiency of the underlying system, or both. ACCURATE achieves 85% QoS with 36% average reduction in cache leakage consumption with a 24% average gain in energy-delay product (EDP) for a 4-core-based chip multiprocessor (CMP) with 6.4% average improvement in performance.
KW - Approximated Computing
KW - Dynamic Associativity Management.
KW - Dynamic Cache Way-Shutdown
KW - Energy efficiency
KW - Energy Efficiency
KW - Multi-cores
KW - Processor scheduling
KW - Quality of service
KW - Real-time scheduling
KW - Real-time systems
KW - Runtime
KW - Schedules
KW - Task analysis
KW - multicores
KW - dynamic cache-way shutdown
KW - Approximated computing
KW - dynamic associativity management (DAM)
KW - energy efficiency
KW - real-time scheduling
UR - http://www.scopus.com/inward/record.url?scp=85127076696&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2022.3161407
DO - 10.1109/TCAD.2022.3161407
M3 - Article
AN - SCOPUS:85127076696
VL - 41
SP - 5246
EP - 5260
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SN - 0278-0070
IS - 12
M1 - 9739790
ER -