An analogue and mixed-signal Built-In-Self-Test (BIST) scheme suitable for detecting manufacturing defects in embedded linear macros is presented. The BIST scheme uses a delta-sigma (ΔΣ) modulator and a binary counter to perform an analogue test response compaction technique. This technique produces a signature for a circuit under test, which relates to the amplitude and frequency of the analogue response. Fault simulations performed on a two-stage CMOS operational amplifier and a continuous-time state variable filter have shown that a fault coverage (>80%) is attainable. These simulation results suggest that the probability of any fault masking occurring using the proposed compression technique is insignificant.
|Number of pages||12|
|Early online date||21 Mar 2001|
|Publication status||Published - 1 Apr 2001|