True random number generators (TRNGs) play a very important role in modern cryptographic systems. Field-programmable gate arrays (FPGAs) form an ideal platform for hardware implementations of many of these security algorithms. In this brief, we present a highly efficient and tunable TRNG based on the principle of beat frequency detection, specifically for Xilinx-FPGA-based applications. The main advantages of the proposed TRNG are its on-the-fly tunability through dynamic partial reconfiguration to improve randomness qualities. We describe the mathematical model of the TRNG operations and experimental results for the circuit implemented on a Xilinx Virtex-V FPGA. The proposed TRNG has low hardware footprint and built-in bias elimination capabilities. The random bitstreams generated from it pass all tests in the NIST statistical testsuite.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Early online date||10 May 2016|
|Publication status||Published - 4 Apr 2017|
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- Department of Computer Science - Senior Lecturer in Computer Science
- School of Computing and Engineering
- Centre for Planning, Autonomy and Representation of Knowledge - Member
- Centre for Thermofluids, Energy Systems and High-Performance Computing - Member
- Centre for Biomimetic Societal Futures