An Improved DCM-based Tunable True Random Number Generator for Xilinx FPGA

Anju Johnson, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay

Research output: Contribution to journalArticle

31 Citations (Scopus)

Abstract

True random number generators (TRNGs) play a very important role in modern cryptographic systems. Field-programmable gate arrays (FPGAs) form an ideal platform for hardware implementations of many of these security algorithms. In this brief, we present a highly efficient and tunable TRNG based on the principle of beat frequency detection, specifically for Xilinx-FPGA-based applications. The main advantages of the proposed TRNG are its on-the-fly tunability through dynamic partial reconfiguration to improve randomness qualities. We describe the mathematical model of the TRNG operations and experimental results for the circuit implemented on a Xilinx Virtex-V FPGA. The proposed TRNG has low hardware footprint and built-in bias elimination capabilities. The random bitstreams generated from it pass all tests in the NIST statistical testsuite.
Original languageEnglish
Pages (from-to)452-456
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume64
Issue number4
Early online date10 May 2016
DOIs
Publication statusPublished - 4 Apr 2017
Externally publishedYes

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