Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing

E. Kapetanakis; P. Normand; D. Tsoukalas; K. Beltsios; J. Stoemenos; S. Zhang; J. Van Den Berg

doi:10.1063/1.1328101

Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si⁺ implantation and annealing

E. Kapetanakis, P. Normand, D. Tsoukalas, K. Beltsios, J. Stoemenos, S. Zhang, J. Van Den Berg

Research output: Contribution to journal › Article › peer-review

141 Citations (Scopus)

Abstract

Thin SiO₂ oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance-voltage and source-drain current versus gate voltage characteristics of devices implanted with a dose of 1 x 10¹⁶cm^-2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

Original language	English
Pages (from-to)	3450-3452
Number of pages	3
Journal	Applied Physics Letters
Volume	77
Issue number	21
DOIs	https://doi.org/10.1063/1.1328101
Publication status	Published - 20 Nov 2000
Externally published	Yes

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10.1063/1.1328101

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AU - Kapetanakis, E.

AU - Normand, P.

AU - Tsoukalas, D.

AU - Beltsios, K.

AU - Stoemenos, J.

AU - Zhang, S.

AU - Van Den Berg, J.

PY - 2000/11/20

Y1 - 2000/11/20

N2 - Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance-voltage and source-drain current versus gate voltage characteristics of devices implanted with a dose of 1 x 1016cm-2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

AB - Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance-voltage and source-drain current versus gate voltage characteristics of devices implanted with a dose of 1 x 1016cm-2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

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Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si⁺ implantation and annealing

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