Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing

E. Kapetanakis, P. Normand, D. Tsoukalas, K. Beltsios, J. Stoemenos, S. Zhang, J. Van Den Berg

Research output: Contribution to journalArticle

130 Citations (Scopus)

Abstract

Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance-voltage and source-drain current versus gate voltage characteristics of devices implanted with a dose of 1 x 1016cm-2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

Original languageEnglish
Pages (from-to)3450-3452
Number of pages3
JournalApplied Physics Letters
Volume77
Issue number21
DOIs
Publication statusPublished - 20 Nov 2000
Externally publishedYes

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implantation
nanocrystals
annealing
fluence
capacitance
oxides
electric potential
energy
hysteresis
electrical properties
dosage
electric fields
ions

Cite this

Kapetanakis, E. ; Normand, P. ; Tsoukalas, D. ; Beltsios, K. ; Stoemenos, J. ; Zhang, S. ; Van Den Berg, J. / Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing. In: Applied Physics Letters. 2000 ; Vol. 77, No. 21. pp. 3450-3452.
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Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si+ implantation and annealing. / Kapetanakis, E.; Normand, P.; Tsoukalas, D.; Beltsios, K.; Stoemenos, J.; Zhang, S.; Van Den Berg, J.

In: Applied Physics Letters, Vol. 77, No. 21, 20.11.2000, p. 3450-3452.

Research output: Contribution to journalArticle

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AU - Van Den Berg, J.

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