CMOS-process-independent average power dissipation macromodelling

P. J. Mather; P. Hallam; M. Brouwer

doi:10.1049/el:19950914

CMOS-process-independent average power dissipation macromodelling

P. J. Mather, P. Hallam, M. Brouwer

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

An accurate CMOS-process-independent average power dissipation macromodel is presented for the inverter and multiple input macros, including NAND, NOR, the transmission gate, pass gate and SRAM cell. A new macro activity time period is defined and accurate macro activity estimations are achieved without the need for analogue propagation delay simulation.

Original language	English
Pages (from-to)	1337-1338
Number of pages	2
Journal	Electronics Letters
Volume	31
Issue number	16
DOIs	https://doi.org/10.1049/el:19950914
Publication status	Published - 3 Aug 1995

Access to Document

10.1049/el:19950914Licence: Unspecified

Cite this

@article{7cbe8c3a8d7c479fb12d348fc9c5662d,

title = "CMOS-process-independent average power dissipation macromodelling",

abstract = "An accurate CMOS-process-independent average power dissipation macromodel is presented for the inverter and multiple input macros, including NAND, NOR, the transmission gate, pass gate and SRAM cell. A new macro activity time period is defined and accurate macro activity estimations are achieved without the need for analogue propagation delay simulation.",

keywords = "CMOS digital integrated circuits, Integrated circuit modelling",

author = "Mather, \{P. J.\} and P. Hallam and M. Brouwer",

year = "1995",

month = aug,

day = "3",

doi = "10.1049/el:19950914",

language = "English",

volume = "31",

pages = "1337--1338",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "John Wiley \& Sons Inc. ",

number = "16",

}

TY - JOUR

T1 - CMOS-process-independent average power dissipation macromodelling

AU - Mather, P. J.

AU - Hallam, P.

AU - Brouwer, M.

PY - 1995/8/3

Y1 - 1995/8/3

N2 - An accurate CMOS-process-independent average power dissipation macromodel is presented for the inverter and multiple input macros, including NAND, NOR, the transmission gate, pass gate and SRAM cell. A new macro activity time period is defined and accurate macro activity estimations are achieved without the need for analogue propagation delay simulation.

AB - An accurate CMOS-process-independent average power dissipation macromodel is presented for the inverter and multiple input macros, including NAND, NOR, the transmission gate, pass gate and SRAM cell. A new macro activity time period is defined and accurate macro activity estimations are achieved without the need for analogue propagation delay simulation.

KW - CMOS digital integrated circuits

KW - Integrated circuit modelling

UR - https://www.scopus.com/pages/publications/0029634624

U2 - 10.1049/el:19950914

DO - 10.1049/el:19950914

M3 - Article

AN - SCOPUS:0029634624

SN - 0013-5194

VL - 31

SP - 1337

EP - 1338

JO - Electronics Letters

JF - Electronics Letters

IS - 16

ER -

CMOS-process-independent average power dissipation macromodelling

Abstract

Access to Document

Other files and links

Fingerprint

Cite this