Direct Cu-Cu thermo-compression bonding for 3D-stacked IC integration

Wouter Ruythooren, Serguei Stoukatch, Konstantina Lambrinou, Piet De Moor, Bail Swiiinen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

9 Citations (Scopus)


The SD-stacked IC (3D-SIC) approach of lMEC is based on the fabrication of through-wafer interconnects using front-end type processes, achieving a maximal die-to-die interconnect density of up to 104 interconnects/mm'. This approach interferes minimally with back-end interconnect capabilities, and allows to reroute interconnect lines through the die from any back-end of line (BEOL) metal layer. The present article reports on the Cu-Cu thermo-compression bonding of 5 /mi-diameter Cu nails to polished Cu blankets. The bond strength was assessed through die shear tests. Cu-Cu shear stress values of up to 100 MPa were measured. The impact of the bonding conditions (i.e. bonding temperature and force) on the bond strength was evaluated, while the shear stress was a posteriori correlated to the surface roughness of the Cu bonding substrates. Moreover, the effect of a pre-bonding etch process aiming at the elimination of the bond-compromising Cu oxides was investigated.

Original languageEnglish
Title of host publicationProceedings - 2006 International Symposium on Microelectronics, IMAPS 2006
Number of pages6
Publication statusPublished - 1 Dec 2006
Externally publishedYes
Event39th International Symposium on Microelectronics - San Diego, United States
Duration: 8 Oct 200612 Oct 2006
Conference number: 39


Conference39th International Symposium on Microelectronics
Abbreviated titleIMAPS2006
Country/TerritoryUnited States
CitySan Diego


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