High-Efficiency Power Amplifier Design Including Input Harmonic Termination

S. Gao, P. Butterworth, S. Ooi, A. Sambell

Research output: Contribution to journalArticlepeer-review

53 Citations (Scopus)


This letter presents the design of a high-efficiency Class-F power amplifier in pseudomorphic high electron mobility transistor technology using a novel load-pull/source-pull simulation-based approach. The second harmonic input termination is shown to have a critical influence on performance, which is justified by the shape of the simulated waveforms. Experimental validation is carried out on a 2-GHz practical circuit using a medium-power packaged device. Two cases are compared both theoretically and experimentally: for the best and worst case second harmonic input terminations, 76% and 42% saturated power-added efficiency are measured, respectively. In addition, the worst case termination degrades the saturated C/I3 by 7.5 dB.

Original languageEnglish
Article number1588944
Pages (from-to)81-83
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Issue number2
Publication statusPublished - 1 Feb 2006
Externally publishedYes

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