Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms

Reconfigurable systems are increasingly being employed in a large class of today’s heterogeneous real-time embedded systems which often demand satisfaction of stringent timeliness constraints. However, executing a set of hard real-time applications on reconfigurable systems such that all timing constraints are satisfied while also allowing efficient resource utilization requires effective scheduling, mapping and admission control strategies. This letter presents methodologies for scheduling periodic hard real-time dynamic task sets on fully and partially reconfigurable field-programmable gate arrays (FPGAs). The floor of the FPGA is assumed to be statically equipartitioned into a set of homogeneous tiles (each of which act as individual processing elements or PEs) such that any arbitrary task of the given task set may be feasibly mapped into the area of a given tile. Experimental results reveal that the proposed algorithms are able to achieve high resource utilization with low task rejection rates over a variety of simulation scenarios.