Abstract
A self-balanced charge pump (CP) to achieve nearly zero phase error is proposed and analyzed. The proposed topology is based on an additional mirror CP and mirror phase/frequency detector(PFD). The mirror CP and PFD balance charges and generate a bias for the master CP. The proposed CP is designed based on the SMIC 0.25-μm 1P5M CMOS process with a 2.5-V supply voltage. HSPICE simulation shows that even if the mismatch of the PFD were beyond 10%, the charge pump could still keep nearly zero phase error. The proposed CP needs only one side of bias current; the other side of the bias is self-balanced, so it is irrelevant to the current mismatch.
Original language | English |
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Pages (from-to) | 111-124 |
Number of pages | 14 |
Journal | Circuits, Systems, and Signal Processing |
Volume | 25 |
Issue number | 1 |
DOIs | |
Publication status | Published - 1 Feb 2006 |
Externally published | Yes |