System on Programmable Chip for Real-Time Control Implementations

D. L. Sancho-Pradel, S. R. Jones, R. M. Goodall

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Citations (Scopus)

Abstract

This paper presents the architecture of a System on Programmable Chip (SOPC) solution for embedded real-time control applications. It integrates a general-purpose processor, an application specific processor (CSP II), an AMBA compliant bus and a standard communication interface (Ethernet) on a single FPGA. The design supports high-speed, adaptive real-time control and integrates in a single device all the digital electronics, reducing the required external logic. The programming of the system is supported by software libraries that automatically transform the control law's equations into the processor's native Instruction Set.

Original languageEnglish
Title of host publicationProceedings - 2002 IEEE International Conference on FieId-Programmable Technology (FPT)
PublisherIEEE
Pages276-283
Number of pages8
ISBN (Electronic)0780375742, 9780780375741
DOIs
Publication statusPublished - 2002
Externally publishedYes
Event1st IEEE International Conference on FieId-Programmable Technology - The Chinese University of Hong Kong, Hong Kong, Hong Kong
Duration: 16 Dec 200218 Dec 2002
Conference number: 1
https://dblp.org/db/conf/fpt/index (Archive)
https://dblp.org/db/conf/fpt/fpt2002.html (Program)
https://ieeexplore.ieee.org/document/1188692 (Research Output)

Conference

Conference1st IEEE International Conference on FieId-Programmable Technology
Abbreviated titleFPT 2002
Country/TerritoryHong Kong
CityHong Kong
Period16/12/0218/12/02
Internet address

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